**QP-DYN: classes of algorithms for cryptography of flows**

These are newly developed algorithms based on innovative mathematics and capable of exceptional performance even on very small devices. They allow to encrypt any type of digital flow: from messaging to the transmission of images or sounds without introducing redundancies and delays that are not perceivable in the human sense.

Competitive advantages

The most original feature that makes these algorithms unique in the general view of flow algorithms is modularity.

The algorithms of this class are modular in the sense that they depend not only on numerical parameters, but also on functions that can be changed giving rise to different algorithms.

As a result, the algorithm itself becomes part of the secret key, making any attacks virtually impossible since the attacker does not know which algorithms are used and therefore finds it impossible to develop an attack plan. This is very different from security by oscurity in which there is only one algorithm that is kept secret.

An important index of cryptographic robustness is the degree of “chaoticity of the produced sequences” which can be measured by means of the most known and exacting batteries of statistical tests.

The results obtained, allow us to state that the algorithms of this class have exceptionally good performances. So they can also be used as new and powerful pseudo-random string generators.

For any of the two existing versions of the algorithm, theoretical attacks are known.

The properties of safety, chaos and speed are competing. The difficulty in producing a good flow algorithm is to find a satisfactory balance between these needs.

According to the benchmarks published online by the Organizing Committee of the international conference

E-Stream, QP-DYN has performances comparable to those of the 4 algorithms selected on a par with the winners in the Software section. None of the finalist algorithms was superior in all the tests and for this reason not a single winner was chosen.

The fast version of the QP-DYN recorded exactly the same behavior: superior in some tests, not superior in others; thus demonstrating that it is at least equivalent to the flow algorithms judged to be the best in the world by the international community.

Possible Users

1) Many nations or large companies prefer to work with their own algorithms and are reluctant for political or competition reasons to use standard algorithms whose market is dominated by the US and Israel. Modularity allows this requirement to be met by creating a multiplicity of schemes that generate completely different algorithms.

2) Pseudo-random string generators have their own market, independent of cryptography, since they play an important role in many engineering or mathematical applications and in the large gambling market. We have found that many companies, such as SOGEI, use analog generators, which are very slow and expensive. Placing a QP-DYN-Generator on the market would be a cost-free operation for CSEC and such a product would have incomparably lower costs, incomparably higher performance and would guarantee greater security or more comparable to that of analogue generators.

3) Thales Alenia Spazio.

4) Ministries of Defense.

5) The subset of potential users of CSEC StreamCipher not so much interested in the direct use of the program as in its inclusion in a more complex product.

Possible developments

1) Hardware version.

It is well known that high performance algorithms in software can give much worse performance in hardware and vice versa. The hardware version of the QP-DYN has been theoretically developed and is based on completely different mathematical techniques from those used in the software version. The hardware version of QP-DYN has been subjected to the E-Stream conference benchmarks and has shown that it has performances comparable to those of the fastest algorithm in this section (Trivium), but far superior security properties. Two developments would be necessary and urgent:

1a) Patent the new algorithm.

2a) Implement it on FPGA and eventually on ASIC.